November 21st- Solutions for Process Induced Stress/ Warpage Simulation of IC Packaging Webinar

on 11/07/2014


2:30-3:00 PM EST (7:30-8:00 PM UTC ) | November 21, 2014


The growing global demand for highly sophisticated and ever smaller electronic goods has made Integrated Chip (IC) packaging challenging and critical to system performance . The residual stress and warpage induced by manufacturing processes are critical issues for plastic encapsulated IC packages. In this webinar, we will present an integrated workflow within Moldex3D to simulate the filling, curing and post mold curing stages. By considering the effects of temperature and chemical reaction to the viscoelasticity of EMC, pvTC of EMC and mismatch CLTE within the package components, the residual stress and warpage after post mold curing can be correctly predicted. In addition, the other application examples of Moldex3D in the MUF, SiP, void prediction, wire sweep and paddle shift will be also presented in the webinar.




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